This invention relates to a semiconductor device and, more particularly, to a diode incorporated in a semiconductor device and a process for fabricating a protective diode.
Diodes have found a wide variety of applications in electric circuits. The diode permits electric current to flow therethrough only unidirectionally. When being focused on the diode characteristics that it xe2x80x9cflows forward electric currentxe2x80x9d, the diode is used as an essential part of a rectifier. On the other hand, when being focused on the diode characteristics that it xe2x80x9cblocks reverse electric currentxe2x80x9d, the diode serves as a protective element against abnormal voltage applied to a circuit component.
The later application is hereinbelow described. A semiconductor device has plural conductive terminals between an internal integrated circuit and an external electric circuit, and electric signals are transferred between the external circuit and the internal integrated circuit through the conductive terminals. Thus, the conductive terminals are indispensable components of a semiconductor device. However, the conductive terminals are exposed to the environment, and extremely high serge voltage is liable to be applied to the conductive terminals. If the extremely high serge voltage is directly applied to circuit components of the internal integrated circuit, the circuit components are seriously damaged, and the semiconductor device is to be replaced with a new one.
In order to protect the circuit components of the internal integrated circuit device against the extremely high serge voltage, protective diodes are formed in the semiconductor device, and are connected to conductive paths between the conductive terminals and the circuit components of the internal integrated circuit.
FIG. 1 shows a typical example of the protective diode. The prior art protective diode 1 is usually connected to a signal path between a conductive terminal and an input transistor of an integrated circuit. The protective diode 1 includes a heavily doped n-type well 2, a p-type impurity region 3 and a p-type guard ring 4. The heavily doped n-type well 2 is formed in an n-type semiconductor substrate, and the p-type impurity region 3 and the heavily doped n-type well 2 forms a p-n junction serving as a Zener diode. The p-type impurity region 3 is encircled by the p-type guard ring 4, which is deeper than the p-type impurity region 3. Thus, the p-type impurity region 3 and the p-type guard ring 4 form in combination a graft base structure.
The p-type guard ring expands the p-n junction, and the wide p-n junction allows the prior art protective diode 1 to flow a large amount of electric current due to the extremely high surge voltage or electrostatic discharge into the n-type semiconductor substrate. In other words, the wide p-n junction is desirable from the viewpoint of the anti-electrostatic discharge characteristics of the protective diode. However, the wide p-n junction has a large amount of parasitic capacitance. While the integrated circuit is operating, an input signal is supplied from the associated conductive terminal to the input transistor. A large amount of parasitic capacitance is causative of deformation of the waveform of the input signal, and the wide p-n junction is not desirable from the viewpoint of signal propagation characteristics. Thus, there is a trade-off between the anti-electrostatic discharge characteristics and the signal propagation characteristics.
The p-n junction between the p-type impurity region 3 and the heavily doped n-type well 2 has a strong influence on both of the parasitic capacitance and the breakdown voltage, and the designer suffers from the parasitic capacitance strongly tied up to the breakdown voltage in the prior art diode. In detail, the prior art diode is expected to be broken down at a certain voltage before the input transistor is damaged. However, the prior art protective diode is to be maintained in off-state while the electric signal is propagated between the conductive terminal and the input transistor. The breakdown phenomenon takes place at a critically strong electric field created across the depletion layer developed from the p-n junction between the p-type impurity region 3 and the heavily doped n-type well 2. The heavier the dopant concentration, thinner the depiction layer. The electric field easily exceeds the critical value in a thin depletion layer. For this reason, the breakdown voltage is mainly dependent on the impurity concentration of the heavily doped n-type well 2. The parasitic capacitance is dependent on the thickness of the depletion layer as well as the area of the p-n junction. The thin depletion layer undesirably increases the parasitic capacitance. When a designer gives a high breakdown voltage to the prior art diode 1, the parasitic capacitance is unavoidably increased, and the electric signal tends to be deformed due to the large parasitic capacitance. Thus, the breakdown voltage is strongly tied up to the parasitic capacitance, and the designer feels it difficult to design an optimum diode. The obstacle for the designer is the parasitic capacitor strongly tied up to the breakdown voltage.
Although another prior art diode is disclosed in Japanese Patent Publication of Unexamined Application (laid-open) No. 8-153887, the prior art diode is a photo diode. The technical target of the prior art photo diode is to improve the signal-to-noise ration as well as widen the dynamic range, and a heavily doped p-type impurity region is formed in the heavily doped n-type well by using an ion-implantation or a thermal diffusion technique.
It is therefore an important object of the present invention to provide a diode, which is adjustable to an appropriate breakdown voltage without taking parasitic capacitance into account.
It is also an important object of the present invention to provide a process for fabricating the protective diode.
To accomplish the object, the present invention proposes to form plural junctions one of which has an influence on the breakdown voltage of a diode and the other of which dominates the parasitic capacitor.
In accordance with one aspect of the present invention, there is provided a diode comprising a first semiconductor layer having a first conductivity type, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type and including plural regions different in dopant concentration so as to form plural junctions different in electric characteristics from one another.
In accordance with another aspect of the present invention, there is provided a process for fabricating a diode, comprising the steps of a) preparing a heavily doped semiconductor layer having one conductivity type, b) growing a lightly doped semiconductor layer of the aforesaid one conductivity type on the heavily doped semiconductor layer, c) forming a guard ring having the other conductivity type opposite to the aforesaid one conductivity type in the lightly doped semiconductor layer so as to form a first junction together with the lightly doped semiconductor layer, d) forming an impurity region of the aforesaid one conductivity type in a surface portion of the lightly doped semiconductor layer inside of the guard ring, and e) forming another impurity region of the other conductivity type in a surface portion of the impurity region and a surface portion of the guard ring so as to form a second junction different in electric characteristics from the first junction together with the impurity region.
In accordance with another aspect of the present invention, there is provided a process for fabricating a diode, comprising the steps of a) preparing a heavily doped semiconductor layer having one conductivity type, b) growing a lightly doped semiconductor layer of the aforesaid one conductivity type on the heavily doped semiconductor layer, c) forming an impurity region of the aforesaid one conductivity type in the lightly doped semiconductor layer and d) forming another impurity region having the other conductivity type opposite to the aforesaid one conductivity type in a surface portion of the impurity region and a surface region of the lightly doped semiconductor layer so as to form a first junction together with the lightly doped semiconductor layer and a second junction different in electric characteristics from the first junction together with the impurity region.